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727 IP
201
0.3729
Ultra High Performance & High Density 12-track Standard Cell library - TSMC 22nm ULP / ULL, supports 30/35/40nm channel length
Dolphin offers an extensive array of Standard Cell libraries that have been methodically tested and verified in silicon for each process technology su...
202
0.3729
Ultra High Performance & High Density 12-track Standard Cell library - TSMC 28nm HPC / HPC+ / HPM / HP / HPL / LP / ULP, supports 30/35/40nm channel length
Dolphin offers an extensive array of Standard Cell libraries that have been methodically tested and verified in silicon for each process technology su...
203
0.3729
Ultra High Performance 14-track Standard Cell library - TSMC 22nm ULP / ULL, supports 30/35/40nm channel length
Dolphin offers an extensive array of Standard Cell libraries that have been methodically tested and verified in silicon for each process technology su...
204
0.3729
Ultra High Performance 14-track Standard Cell library - TSMC 28nm HPC / HPC+ / HPM / HP / HPL / LP / ULP, supports 30/35/40nm channel length
Dolphin offers an extensive array of Standard Cell libraries that have been methodically tested and verified in silicon for each process technology su...
205
0.3729
Dolphin Temperature Sensor
Thermal sensor IP consists of an analog hardmacro block and a digital Soft-IP wrapper. The soft IP sweeps a digital code to the analog block, which in...
206
0.118
HJTC 0.11um eFlash Process Generic Core Cell Library (porting from FSR0K_D)
HJTC 0.11um eFlash Process Generic Core Cell Library (porting from FSR0K_D)...
207
0.118
UMC 0.11um AL/LL Logic Process miniLib standard cell library
UMC 0.11um AL/LL Logic Process miniLib standard cell library...
208
0.118
UMC 0.11um CIS Process cell library
UMC 0.11um CIS Process cell library...
209
0.118
UMC 0.11um HS/AL Logic Process High Density Version MPCA core cell library with mini programming layer from V1 to M4
UMC 0.11um HS/AL Logic Process High Density Version MPCA core cell library with mini programming layer from V1 to M4...
210
0.118
UMC 0.11um HS/ALE Logic Process MPCA Cell Library With minimum Via1/M2/Via2/M3/Via3/M4 programming
UMC 0.11um HS/ALE Logic Process MPCA Cell Library With minimum Via1/M2/Via2/M3/Via3/M4 programming...
211
0.118
UMC 0.11um HS/FSG Logic Process high density MPCA core cell library with minimum Via1 to M4 programming
UMC 0.11um HS/FSG Logic Process high density MPCA core cell library with minimum Via1 to M4 programming...
212
0.118
UMC 0.13um HS/FSG Logic Process metal2-start programming gate array cell library for FSC0H_J (ECO_M2)
UMC 0.13um HS/FSG Logic Process metal2-start programming gate array cell library for FSC0H_J (ECO_M2)...
213
0.118
UMC 0.13um LL/FSG Logic Process Metal1 Start ECO core cell library
UMC 0.13um LL/FSG Logic Process Metal1 Start ECO core cell library...
214
0.118
UMC 0.13um LL/FSG Logic Process miniLib+ M1 ECO cells
UMC 0.13um LL/FSG Logic Process miniLib+ M1 ECO cells...
215
0.118
UMC 0.13um SP/FSG Logic Process Metal1 Start ECO core cell library
UMC 0.13um SP/FSG Logic Process Metal1 Start ECO core cell library...
216
0.118
UMC 0.18um Generic process MPCA core cell library
UMC 0.18um Generic process MPCA core cell library...
217
0.118
UMC 0.18um GII Logic Process 3.3V core cell library
UMC 0.18um GII Logic Process 3.3V core cell library...
218
0.118
UMC 0.3um HV process, M1-start ECO (engineering change order) core cell library
UMC 0.3um HV process, M1-start ECO (engineering change order) core cell library...
219
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...
220
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)...
221
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)...
222
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)...
223
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)...
224
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...
225
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...
226
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...
227
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)...
228
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)...
229
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...
230
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)...
231
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)...
232
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)...
233
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)...
234
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...
235
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)...
236
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)...
237
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)...
238
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)...
239
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...
240
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...
241
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...
242
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)...
243
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)...
244
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...
245
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)...
246
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)...
247
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)...
248
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)...
249
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 1.8V device RTC Core Library
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 1.8V device RTC Core Library...
250
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...
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